Professor Manus Hayne SFHEA

Research Interests

Current research includes the study of quantum dots in different materials systems, with a particular emphasis on 'type-II' GaSb quantum dots and quantum rings embedded in GaAs. These structures confine positive charge (holes) in a very deep potential, but do not confine electrons. This makes them very different from conventional 'type-I' quantum dots that confine both electrons and holes. Besides their unusual physical properties, GaSb quantum dots also have applications in a wide range of areas including solar cells, single-photon LEDs and lasers.

We are also pioneering the development of fast, low-voltage non-volatile memories based on III-V hetereostructures, as a potential candidate 'universal memory' that could be used either as active memory or for data storage.

Other work includes transport properties of two-dimensional electrons in GaSb/AlGaSb heterojunctions and confinement properties of 'conventional' InAs/GaAs quantum dots.

Research Overview

My research interests are in the physics and applications of low-dimensional semiconductor nanostructures (quantum wells, wires and dots). I collaborate with many UK and European universities, research institutes and companies.

Career Details

I studied at the University of Southampton and did a PhD and a postdoc at the University of Exeter, before moving to the European mainland. There I briefly worked in Paris, and then at the KU Leuven, Belgium for nearly 10 years, where I investigated semiconductor nanostructures in very high magnetic fields (up to 50 T). I returned to the UK to join the Physics Department in Lancaster in June 2006.

PhD Supervision Interests

Two projects are available. (1) Universal memory combines the best features of DRAM and flash, i.e. is non-volatile, low-voltage, non-destructively read, fast, cheap and high endurance. We recently demonstrated novel III-V compound semiconductor candidate universal memory cells (ULTRARAM™), and research is rapidly progressing towards device scaling, fabrication of small arrays and implementation on Si substrates. The objective of this project is to develop and implement the III-V CMOS logic that will enable addressing of bits in large arrays (up to 1 Mbit). It will be suitable for someone with an interest in semiconductor device physics or electronic engineering. (2) VCSELs were recently used for 3D sensing in smartphones. 'Eye-safe’ VCSELs that emit at>1400 nm are preferred, but, all production VCSELs, including those in smartphones, lase at>1000 nm. The project will develop>1400 nm VCSELs, based on our patented GaSb quantum ring technology.